Crypto Hardware

Trusted Computing Platform Alliance
Secure Coprocessors Research
Cypris
Efficient Memory Integrity Verification and Encryption for Secure Processors (G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten van Dijk, Srini Devadas, 2003)
Streamto: streaming content using a tamper-resistant token (Jieyin Cheng, Cheun Ngen Chong, Jeroen Doumen, Sandro Etalle, Pieter H Hartel and Stefan Nikolaus, 2005)
Ingrid Verbauwhede, Alireza Hodjat, David Hwang, Bo-Cheng Lai (20.04.05)
Cryptoprocessors
- MPC180 security processor (Motorola)
- Xtensa+, A Crypto Processor for Embedded Applications Charles Henri-Gros, Alan Keefer, Ankur Singla (25.08.03)
- Efficient Memory Integrity Verification and Encryption for Secure Processors (G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas)
Energy
- The Energy Cost of Secrets in Ad-hoc Networks (Alireza Hodjat, Ingrid Verbauwhede, 2002)
FPGA-related
- The "FPGA Place-and-Route Challenge"
- RC5 on FPGAs
- List of FPGA-based Computing Machines
- How Secure Are FPGAs in Cryptographic Applications (Thomas Wollinger and Christof Paar, 2003)
- Security on the FPGAs: State of the Art Implementations and Attacks (Wollinger, Guajardo, Paar)
- Cryptography on FPGAs ( State of the Art Implementations and Attacks)
- Theses
  - High Speed FPGA Architectures for the Data Encryption Standard (Jens-Peter Kaps)
- Papers
  - Modular Exponent realization on FPGAs (Jüri Põldre, Kalle Tammemäe, Marek Mandre)
  - Implementation of the Twofish Cipher Using FPGA Devices (Pawel Chodowiec, Kris Gaj)
  - Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor Miljan Vuleti´c, Laura Pozzi, and Paolo Ienne, FCCM 2004 (05.07.04)
  - A fully pipelined memoryless 17.8 Gbps AES-128 encryptor (Kimmo U. Järvinen, Matti T. Tommiska, Jorma O. Skyttä, ACM SIGDA 2003)
  - Hardware-based Secure WLAN Solution (Simon James Graham, 2003)
  - High Efficiency Counter Mode Security Architecture via Prediction and Precomputation ( Weidong Shi, Hsien Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu, Alexandra Boldyreva, 2005)
  - Reconfigurable Hardware Network Packet Scanning Structure (K. C. S. Cheng and M. Fleury)
Architectural considerations for cryptanalytic hardware (Ian Goldberg, David Wagner)
Programmable Logic Jump Station
Companies
- Pijnenburg Securealink
Ascom IDEACrypt
DES implementations
- EFF DES Cracker Project
- VHDL/Xilinx DES
- DES Macroblock
  - [www.cosic.esat.kuleuven.ac.be/des/:EFF DES Cracker Source Code:VHDL:28.06.00] (VHDL)
Groups
- CLU
- Design & Test Center (Tallinn Technical University)
  - A VLSI implementation of RSA and IDEA encryption engine ((Põldre, Buldas; Norchip 97))
  - DES Macroblock
  - Cryptographic module for digital communications (IDEA & RSA in FPGA)
- IV Group (UCLA)
  - UCLA IV group 2.29 Gb/s Rijndael Processor (25.10.02)
Free IP Project
Secured Technology
- CyberPhone
Products
- Atalla Security Products
- IRE Inc SafeNet/DSP
CipherFlow project (using SIMD machines in cryptanalysis)
COPACOBANA - Special-Purpose Hardware for Code-Breaking (18.01.07)
@ENIGMA

Cryptology Pointers by Helger Lipmaa
Got any suggestions or additional links? Mail to <lipmaa>research.cyber.ee
NB! If you find any broken links, please be kind and report them to me together with their current location!

(C) Helger Lipmaa 1997-2009.